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Optional Discrete LEDs
Operation
Each LED has one side connected to ground and the other side connected to a pin on the
device via a 390 Ω current limiting resistor. To light an individual LED, drive the associated
FPGA control signal High.
If the FPGA is not yet configured, the LEDs may be dimly lit because pull-up resistors are
enabled during configuration. The FPGA’s PUDC_B pin is connected to GND on the
board.
UCF Location Constraints
Figure 2-13 provides the UCF constraints for the four push-button switches, including the
I/O pin assignment, the I/O standard used, the output slew rate, and the output drive
current.
NET
NET
NET
NET
NET
NET
NET
NET
"LED<7>"
"LED<6>"
"LED<5>"
"LED<4>"
"LED<3>"
"LED<2>"
"LED<1>"
"LED<0>"
LOC
LOC
LOC
LOC
LOC
LOC
LOC
LOC
=
=
=
=
=
=
=
=
"W21"
"Y22"
"V20"
"V19"
"U19"
"U20"
"T19"
"R20"
|
|
|
|
|
|
|
|
IOSTANDARD
IOSTANDARD
IOSTANDARD
IOSTANDARD
IOSTANDARD
IOSTANDARD
IOSTANDARD
IOSTANDARD
=
=
=
=
=
=
=
=
LVCMOS33
LVCMOS33
L VCMOS33
LVCMOS33
LVCMOS33
LVCMOS33
LVCMOS33
LVCMOS33
|
|
|
|
|
|
|
|
SLEW
SLEW
SLEW
SLEW
SLEW
SLEW
SLEW
SLEW
=
=
=
=
=
=
=
=
SLOW
SLOW
SLOW
SLOW
SLOW
SLOW
SLOW
SLOW
|
|
|
|
|
|
|
|
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
DRIVE
=
=
=
=
=
=
=
=
8
8
8
8
8
8
8
8
;
;
;
;
;
;
;
;
Figure 2-13:
UCF Constraints for Eight Discrete LEDs
Optional Discrete LEDs
The Spartan-3A/3AN Starter Kit board provides two optional LEDs, shown in Figure 2-14 .
Depending on which features are used by an application, these LED connections may be
also used as user-I/O pins.
FPGA PROG_B Pin
(Press to reset/reprogram FPGA)
FPGA_INIT_B
(W21)
RED
FPGA_AWAKE
(AB15)
YELLOW
FPGA DONE Pin
(Lit when FPGA is configured)
GREEN
UG334_c2_14_052407
Figure 2-14:
AWAKE and INIT_B LEDs
Spartan-3A/3AN FPGA Starter Kit Board User Guide www.xilinx.com
UG334 (v1.1) June 19, 2008
31
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